a b | sum carry
----------------
0 0 | 0 0
0 1 | 1 0
1 0 | 1 0
1 1 | 0 1
Now we need to implement this in logic using the basic gates we have built till now.
We will use different logic for the sum and carry bits.
a b | sum
----------
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 0
The above truth table is that of an XOR chip.
a b | carry
----------------
0 0 | 0
0 1 | 0
1 0 | 0
1 1 | 1
The above truth table is that of an AND chip.
From the above inferences, we can implement a half adder using an XOR, and AND chip.
Here is the HDL code of a Half Adder.
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